Jasper Design Automation is a privately-held Electronic Design Automation (EDA) company leveraging formal technologies to deliver high value/high ROI solutions for the design and verification of electronic systems and semiconductors.
The company's production-proven formal verification solutions have been used on over 150 successful chip projects. System architects, logic designers, verification engineers and silicon bring-up teams are able to successfully verify SOC on-chip protocols; verify and debug architectural specifications; design, explore and debug RTL and prove the correctness of block-level functionality. Jasper technology also addresses behavior-based RTL analysis and verification by logic designers that also accelerates knowledge transfer, improves design maintenance, and enables efficient reuse. Jasper solutions provide high value to both novice and advanced users.
The JasperGold® formal technology platform delivers the industry's highest proof capacity, for seamless scalability from formal assertion-based verification (ABV) to exhaustive end-to-end proofs of micro-architecture-level properties. With multiple proof engines, automated Formal Scoreboard™, Proof Accelerators™, and ProofGrid™, JasperGold technology can validate complex designs that include packet-based data transportation, FIFOs, memories, caches and multiple clock domains. JasperGold technology delivers superior formal verification performance enabled by powerful, patented advanced formal techniques and state-of-the-art core engines. JasperGold's context-sensitive proof visibility and interactive Design Tunneling™ empower users to prove the correctness of critical design functionality.
Jasper's latest Behavioral Indexing™ technology delivers dramatic breakthroughs in design comprehension, driving higher RTL design quality and greater designer productivity. Jasper's Behavioral Indexing technology enables users to iteratively extract, index and store relevant design behaviors, along with the RTL, in a dynamic, executable database. This technology is optimized for complex yet flexible behavior-based analysis and automatic regressions, and works seamlessly with Jasper's formal verification technology platform, JasperGold®.
Aimed primarily at logic designers, this technology is used to confirm and index intended functional behaviors as the RTL is composed, and to easily validate complex, sometimes unintended, interactions among behaviors. This use mode is sometimes referred to as a "Designer Self Test." Powerful comprehension features help designers and verification engineers that "inherit" a design to become intimately familiar with relevant design functionality, without any access to the original design author. This capability empowers any user over the life of the design, or its derivatives, to comprehend, safely modify, and retarget the RTL design for new uses.
Jasper formal solutions address a wide range of design and verification issues throughout all design and verification stages. To enable greater productivity gains, Jasper created the JasperGold Apps architecture. Within this architecture, JasperGold users are able to deploy application-specific tasks that are targeted for specific design and verification methodology issues. These apps feature a common user interface and database that allows users to work seamlessly within and between different applications, thus enabling the following scenarios:
- Work can be shared among JasperGold Apps and among design teams though a common database
- Multiple JasperGold Apps can be launched through a common interface and multiple instances of each JasperGold App can be used for higher parallelism and productivity
- Interaction between JasperGold Apps is enhanced and simplified
Jasper has secured over $27 million in four rounds of funding from investors including Accel Partners, Cambrian Ventures, Foundation Capital, InnKap, Northzone Ventures, and ZenShin Capital. In 2004, Jasper acquired SafeLogic, a Swedish formal verification software company.