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| Management |
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KATHRYN
KRANEN
President and Chief Executive Officer
Kathryn Kranen is responsible for leading Jasper’s
team in bringing the company’s pioneering technology
to the mainstream design verification market. She has 15
years EDA industry experience and a proven management track
record, serving as president and CEO of Verisity Design,
Inc., US headquarters of Verisity Ltd. Kathryn and the team
she built created an entirely new market in design verification.
Verisity later became a public company, and was the top-performing
IPO of 2001. Prior to Verisity, Kathryn was vice president
of North American sales at Quickturn Systems. She started
her career as a design engineer at Rockwell International,
and later joined Daisy Systems, an early EDA company. Kathryn
graduated Summa cum Laude from Texas A&M University
with a B.S. in Electrical Engineering. Kathryn currently
serves as Vice Chair of the EDA Consortium board of directors. |
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CLAUDIONOR
COELHO
Vice President of Engineering
Claudionor Coelho is focused on bringing strong and innovative
formal verification technology to Jasper’s products
and to ensuring the high-quality of Jasper’s tools.
Before joining Jasper Design-Automation, Claudionor worked
in several companies in the US, both in technical and in
management positions, including Integrated Information Technology,
performing the formal verification of a pipelined high-performance
processor, and in Verplex Systems, where he directed the
BlackTie™ team and was responsible for the development
of OVL. He was also a founder of several successful startups,
and he was a counselor for FirCapital Partners in startup
strategy and technology. Claudionor obtained his BSEE (summa
cum laude) and MSCS from the Federal University of Minas
Gerais in Belo Horizonte, Brazil, his PhD-EE/CS from Stanford
University, and his MBA from IBMEC/MG. Dr. Coelho has written
award-winning papers and books, and was a contributing author
to Advanced Formal Verification from Kluwer Academic Publishers.
He was an Associate Professor at the Computer Science Department
at the Federal University of Minas Gerais, Brazil. |
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RAJEEV
RANJAN
Chief Technology Officer
Rajeev Ranjan is responsible for developing Jasper’s
overall technology vision. Prior to joining Jasper, Rajeev
was CTO and VP of Engineering at Real Intent, where he led
the development of their products and set the company’s
technical direction. Before joining Real Intent, he was
in the Advanced Technology Group at Synopsys, where he co-developed
the prototype for Magellan, Synopsys's formal-assisted simulation
product. Rajeev has been active in the area of formal verification
for over 13 years. He has served in the organization and
program committee of many international conferences including
DAC, ICCAD, FMCAD, and CHARME. He has published numerous
articles and holds 5 patents in the area of functional verification.
Rajeev received his bachelors degree from Indian Institute
of Technology, Kanpur, his Masters degree from University
of Illinois at Urbana-Champaign, and his doctorate degree
in formal verification from University of California at
Berkeley. |
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ZIYAD HANNA
Chief Architect and Vice President of Research
Ziyad Hanna is responsible for advancing the company’s breakthroughs in formal verification technology, core engines and system architecture. Prior to joining Jasper, Ziyad was Intel senior principal engineer and the main leader of the Formal Technology Research and Development Group in the Design and Technology Solutions division at Intel Haifa. While at Intel, Ziyad was instrumental in the development of several generations of formal verification systems used on almost all Intel microprocessor designs since early 1990s. A senior IEEE member, Ziyad has been active in the area of formal verification for over 17 years, and has mentored many research projects with academia and served in various international conferences including SAT, ICCAD, DAC and ICCD. He has published more than 25 articles the formal area and holds 8 patents. He received both his B.Sc. and M.S. degrees in computer science at Tel-Aviv University, and is working towards his Ph.D. with research in “Abstract Modeling and Formal Verification of Microprocessors” at the Computing Laboratory of Oxford University.
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