Testimonials |
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John Goodenough discusses formal verification with Jasper at ARM |
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John Goodenough
V.P of Design Technology and Automation
ARM |
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Scott Meeth on using Jasper for RTL verification, protocol certification and post-silicon debug |
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Scott Meeth
Sr. Verification Engineer
NVIDIA |
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Matt Hsu discusses formal verification and how Jasper has helped in a wide variety of verification contracts with major electronics companies. |
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Matt Hsu
Matthew A. Hsu Consulting |
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Brian Bailey, verification guru and industry savant, comments on the advantages of Jasper Design Automation for formal verification. |
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Brian Bailey
Verification Guru
Techbites.com |
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| “We have worked closely with Jasper on a variety of innovative applications, including post-silicon debug, automated register verification and X-propagation analysis. As a results, formal verification using Jasper has become a valuable contributor to the overall process of improving verification quality across a variety of AMD products.” |
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James S. Miller
AMD |
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| “At QUALCOMM, we've seen three aspects of ROI from our use of JasperGold: engineering efficiency, functional coverage, and time-to-market. Regarding engineering efficiency, we've observed cases of a 3x-4x productivity gain where we've applied JasperGold, compared to performing the same tasks with simulation. Our use of JasperGold increases functional coverage, and thereby chip quality, by exposing bugs earlier during chip development.We've seen that JasperGold accelerates time-to-market in certain cases by enabling us to reach verfication closure on late-stage changes
in a day, versus a week.” |
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J. Scott Runner
Senior Director of Engineering
Qualcomm |
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"We chose Jasper formal due to the level of their technology, methodology and support... Jasper solutions help AMD to improve quality and reduce schedule risk. Jasper is now broadly accessible to multiple processor and graphics projects." |
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Paul Tobin
Director of Verification Center of Expertise
AMD |
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"Oracle engineers use Jasper to verify architectures and complex protocols, exposing deep bugs early in the design cycle. Jasper helps reduce the risk of an undetected architectural bug, potentially preventing expensive redesign or performance impact." |
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George Plouffe
Principal Hardware Engineer
Oracle
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"The HP ProCurve ProVision ASIC Verification effort used JasperGold, a property checking tool from Jasper Design Automation. The deployment was a collabortive attempt to realize "targeted ROI" - that is where formal verification was projected to have the greatest value as a complement to simulation. As part of the verification effort, formal verification helped verify critical functionality and showed high ROI for such tasks as paket integrity analysis and flow control" |
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Jim Kasak
HP |
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| "JasperGold capabilities will assist in proving complex IP such as the ARM Contex family of product, in reducing the burden of constrained random simulation, and in formalizing IP specifications for new IP." |
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John Goodenough
Director of Design Technology
ARM |
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| "Formal verification helps in the discovery of subtle RTL issues which are difficult or even impossible to detect in simulation. We strive to thoroughly verify critical logic in these complex designs to ensure discrepancies never have an impact on silicon, and Jasper helps us towards achieving that goal." |
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Paul Tobin
Director of Verification Center of Expertise
AMD |
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| "ARM is applying Jasper technology to the design and verification of increasingly sophisticated IP, with a view to increased assurance levels, reduced verification effort, and lower risk and support costs." |
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John Goodenough
Director of Design Technology
ARM |
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| "NVIDIA has relied successfully
on JasperGold for a number of years in our end-to-end
full proof flow, where we have been able to guarantee
correctness of some of our most complex designs.
Based on these early successes, Jasper's superior
customer support, and the unique scalability of
the tool from property verification to full-proof,
NVIDIA has deployed JasperGold for property verification
of next generation GPU chips." |
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Dan Smith
Hardware Engineering
NVIDIA
CORPORATION |
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| "After using several competing
products, Qualcomm selected Jasper as our formal
verification provider of choice because of their
superior technology and solutions-oriented applications
support. We are now deploying JasperGold across
design and verification teams worldwide to deliver
higher quality in the industry’s most highly
integrated wireless devices." |
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J. Scott Runner
Senior Director of Engineering
Qualcomm |
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| "Oracle engineers use Jasper for our complex chip design and verification. JasperGold has the proof power, performance, and capacity to handle large designs. With Jasper we can perform complex proofs, which are more effective than low-level assertions, and increase engineering productivity and design quality." |
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Durgam Vahia
Principal Hardware Engineer
Oracle |
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| "JasperGold's user interactive
Design Tunneling enable the tool to solve previously
intractable block-level proofs by directing the
engines to consider only the logic which is relevant
to the problem." |
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Prosenjit Chatterjee
Manager, Formal Methods Group
NVIDIA CORPORATION |
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| "JasperGold found several really
subtle, ugly bugs in our large switching network
that would never have been found by simulation.
With Jasper, I hit them in a couple of minutes.
Jasper's support team was great." |
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Senior Staff Engineer
Azul Systems, Inc. |
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| Broadcom Corporation |
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| Marvell |
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| Verification Industry Luminaries
Comment: |
| "With the world moving
to highly-leveraged IP reuse-based design flows and platform-based
design, systematic formal verification is becoming an
imperative. Full formal verification of critical functionality,
combined with coverage metrics for the rest of the design,
is the best way to ensure correctness and enable more
aggressive, competitive designs. Effective system-level
verification depends on a high degree of confidence in
block quality. Formal verification provides the highest
level of confidence possible."
Brian
Bailey |
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| "Jasper is the only
EDA company that is committed to making full formal IC
verification a competitive advantage for its customers."
Professor Moshe Vardi
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| "Jasper's application
of formal technology at the architecture level has enormous
potential to alleviate the most troubling downstream design
and verification challenges."
Professor
Tom Melham
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| “Through a combination
of excellent algorithmic research and a deep understanding
of the problem domain, Jasper is delivering highly effective
formal verification solutions.”
Professor Sharad
Malik
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