Jasper Design Automation | Real-World Applications for Formal Verification Seminar Series

Join Jasper Design Automation for a technical seminar on
How to solve critical verification challenges using state-of-the-art formal technology.

This full-day seminar will be given by technical experts for verification experts just like you.

Gain useful insight for using Jasper formal solutions.
Hear verification case studies presentations from other users.
Speak to verification experts about your own experiences.

Locations and Dates:

February 22 – UK
Beaumont Estate Hotel
Burfield Road, Berkshire
Old Windsor England, SL4 2JJ UK
Tel:+44 (0) 1753 640000
Fax: +44 (0) 1753 640200

March 19 – Germany
Kempinski Hotel Airport München
Terminalstrasse Mitte 20
85356 München, Germany
Tel: +49 89 9782 3620
Fax +49 89 9782 3613

February 28 – Sweden
Scandic Victoria Tower Hotel
Arne Beurlingstorg 3A
164 40 Kista
Sweden
Tel: +46 8 517 533 00

The seminar will focus on real life problems that face design and verification engineers. We will discuss a range of issues you may encounter every day. Our team will show you how to use Jasper tools and technology to address verification issues such as:

Formal verification of RTL blocks
Debug and design exploration
Post - silicon debug and root cause analysis
Verification of ARM-protocol based SoCs (AXI, AMBA, AHB, ACE)
Verification of SoCs with complex memory sub-systems (DDRxx)
SoC and IP connectivity
Control status registers
Closure and coverage
Clock domain crossing
X-propagation
Verification of designs including power-management structures

A light breakfast will be served as well as lunch. At the end of the event, we will have a draw for an iPad 2 for those in attendance.

Individual follow-on sessions will be available after the seminar to dive deeper into requested topics. You can sign-up for those sessions at the live seminar.