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TECHNICAL ADVISORY BOARD  
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Biography of Alan Hu
Dr. Alan J. Hu received his B.S. degree (with honors and academic distinction) as well as his Ph.D. from Stanford University, California.

Currently, he is Associate Professor and Associate Head of the Department of Computer Science at the University of British Columbia. For the past 15 years, his main research focus has been automated, practical techniques for formal verification. Prior to joining UBC, he was a Member of the Research Staff in the VLSI CAD division of Fujitsu Laboratories of America.

Dr. Hu won first place in the Westinghouse (now Intel) Science Talent Search in 1985, was a U.S. National Merit Scholar also in the same year, and was elected to Phi Beta Kappa in 1987. He has served on the program committee of most major CAD and formal verification conferences, and chaired or co-chaired CAV (1998), HLDVT (2003), and FMCAD (2004). He was a Technical Working Group Key Contributor on the 2001 International Technology Roadmap for Semiconductors.

Biography of Brian Bailey
Brian Bailey received his Electrical and Electronic Engineering degree with a first class honors from Brunel University in England.

He is an industry and management consultant, specializing in the functional verification of electronic systems, and a renowned rerification industry veteran and visionary, having contributed to the early development of RTL simulation, hardware emulation, hardware/software co-design and transaction-level modeling using SystemC. He currently chairs the Interface Technical Committee within Accellera, and is also a prolific writer, having published many articles and two recent books on the subject of design and verification.

Biography of Sharad Malik

Sharad Malik received his B. Tech. degree in Electrical Engineering from the Indian Institute of Technology, New Delhi, India, and his M.S. and Ph.D. degrees in Computer Science from the University of California, Berkeley.

Currently he is a Professor in the Department of Electrical Engineering at Princeton University. His research spans all aspects of Electronic Design Automation. His current focus areas are the synthesis and verification of digital systems and embedded computer systems. Dr. Malik has published numerous papers, book chapters and a book (Static Timing Analysis for Embedded Software) describing his research. His research in functional timing analysis and propositional satisfiability has been widely used in industrial electronic design automation tools.

He has received numerous awards, including Best Paper Awards at the International Conference on Computer Design, the Design Automation Conference (DAC), and the Design Automation and Test in Europe (DATE) Conference. He serves/has served on the program committees of DAC, ICCAD and ICCD and was the General Chair for DAC 2004. He is on the editorial boards of the Journal of VLSI Signal Processing, Design Automation for Embedded Systems and IEEE Design and Test. He is a fellow of the IEEE. He is currently serving as the Associate Director of the Gigascale Systems Research Center, a multi-university effort directed towards defining and developing system design methodology with a ten-year horizon.

Biography of Satoshi Goto
Satoshi Goto received his B.E. degree, M.E. degree and doctorate in Electronics and Communication Engineering from Waseda University.

After receiving his doctorate, he joined Central Research Laboratories of NEC where he worked for 31 consecutive years. He was General Manager of C&C Media Research Laboratories and Vice President in charge of computer, software and networking research. After leaving NEC in 2002, he became Chief Executive of Kitakyushu Foundation for the Advancement of Industry, Science and Technology. He became Professor at the Graduate School of Information, Production and Systems at Waseda University, Kitakyushu in April, 2003. He was also a Visiting Scholar at the University of California, Berkeley. In research, Dr. Goto worked on Computer Aided Design for VLSI, Artificial Intelligence approach to VLSI design and combinatorial optimization methods for large scale problems. He is the author or co-author of over 80 papers in VLSI design and Computer Aided Design.

He has served many conferences as an Executive committee member. Among those are the General Chair and Program Chair of ICCAD, General Chair of ASPDAC and committee member of DAC and ISCAS. He was a member of the Board of Director of the IEEE Circuits and Systems, the Institute of Electronics, Information and Communication Engineering and Japanese Society for Artificial Intelligence. Dr. Goto is a fellow of IEEE and a member of the Engineering Academy of Japan. He has received a number of awards and honors, including Distinguished Achievement Awards from the Institute of Electronics, Information and Communication Engineering, and the same award from Japanese Society of Artificial Intelligence, the best paper award from ICCC and Jubilee Medal from IEEE. 



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